1. Field of the Invention
The present invention relates to a method for forming a deep well, and in particular relates to a method for forming a deep well region of a high power device.
2. Description of the Related Art
Traditional high power devices are provided with vertical double diffused MOSFETs (VDMOSFETs) and lateral double diffused MOSFETs (LDMOSFETs), wherein a double diffused MOSFET is representative of a lateral structure and a trench power transistor is representative of a vertical structure.
For forming a high power tolerance laterally diffused metal oxide semiconductor, usually an n-type drift region with low concentration is used to form a high power tolerance structure, and techniques, such as reduce surface field (RESURF) and field-plate are used to perform an optimum adjustments. For forming a high power device (voltage tolerance 300-1000 V), an n-type deep well region with low concentration is usually used for forming a high power tolerance structure. The processes for forming a traditional n-type deep well region are as shown in FIGS. 1A-1D.
As FIG. 1A shows, a substrate 101 is provided and the substrate 101 has a sacrificial layer 103 thereon. Next, FIG. 1B shows a mask layer formed on the sacrificial layer 103, exposing an open region 107, wherein ion doping is performed to the open region 107 to form a doped region 111. FIG. 1C shows that after the patterned mask layer 105 is removed, an annealing process is performed to diffuse the doped region 111 to form a deep well region 113, thus, to complete the process for forming the deep well region.
However, the process mentioned above needs a long period of time for well diffusion to achieve a desired depth. Therefore, a novel process for forming an n-type deep well region of a high power device is needed to reduce time costs of well diffusion.